the first counter is halted at count ten (output nine high) by connecting
the last output to the inhibit input. This output is ANDed with the clock pulse
and fed to the second counter. Since the second counter is in reset
for the first ten pulses, its zero output will be high and therefore cannot be used.
Its tenth output is fed back to reset the first counter. Since this output will be high
only for a short duration, equal to the reset propagation time for both counters,
this output also is unusable.
For driving lamps, a
triac could be used to switch the mains. The output of
the counter does not provide sufficient current to
trigger most triacs and so
an emitter follower stage could be used for providing
sufficient gate drive as shown.
With this circuit arrangement, one side of the
mains is connected to
the circuit ground and so adequate safety procautions
must be observed.
| Warning -
Circuit connects to The Mains. Observe safety precautions. |
